Analog & Power Management IPs
Our driving design platform is a dual output 6 MHz to 12 MHz multi-configurable HF DC-to-DC converter for Li-Ion battery powered devices providing up to 600 mA and 0.8 V to 1.8 V output level.
We offer today a portfolio of foundation IPs that were designed in a top-down approach to be easily exportable between silicon processes.
Customers immediatly receive front-end views like Verilog-A or RTL in order to start working at system level. We are eventually able to export back-end views thanks to our agile design methodology.
- Bandgap reference voltage providing 600 mV ± 3 %, 4-bit trim, non-buffered, 5.5 V
- Precision RC oscillator, F=9 MHz ± 1 0 %, 5-bit trim, 1.8 V
- High-frequency PWM modulator with 4-bit adjusted gain, 4-bit adjusted current injection gain, F=9 MHz, 1.8 V
- Low-ringing gate driver for ultra-high DiDt power switches, patent pending, 5.5 V
- Set of low-offset OpAmp base followers, VCOM=50 mV to 1 V, GBW=5 MHz, 5.5 V
- Low-offset, rail-to-rail, GM transconductance amplifier with constant GM, GBW=5 MHz, 5.5 V
- Slave I2C, using internal clock sampling, Fmax=3600 kHz, 1.8 V